edacentrum | Schneiderberg 32 | 30167 Hannover | fon: +49 511 762-19699 | email: info
edacentrum [dot] deup
edacentrum [dot] deup 
At this web page you find the programme of the ADTC and edaWorkshop24. You may expand the programme for each session by clicking on the session title. You will find the detailed timetable, presentation titles and author names. If additional information like an abstract, curriculum vitae or (for attendees of the ADTC and edaWorkshop24 only) slides is available, a link below the presentation title is displayed.
You may download all presentations as one single ZIP file (~53 MB). (Access for logged in event attendees only!)
| 08:30 | Welcome Wolfgang Nebel (edacentrum, D) |
| 08:35 | Innovation Engineering through Automotive Chiplet Standardization Andreas Aal (Volkswagen, D) Peter Schneider (Fraunhofer IIS/EAS, D) Slides (Access for event attendees only) |
| 08:55 | Automotive Chiplet System – a New Approach for Automotive High-Performance Compute Thomas Schamm (Bosch, D) Joern-Ole Godbersen (Bosch, D) Slides (Access for event attendees only) |
| 09:15 | Model-Based Design for System-of-Chiplets Computing Platforms – an Automotive Use Case Denis Dutoit (CEA-LIST, F) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 09:35 | Challenges of Chiplet Designs and How They Can Be Addressed with EDA Martin Biehl (Cadence, D) Slides (Access for event attendees only) |
| 09:55 | Design und Manufacturing Co-Optimization to Enable Industrial Chiplet Solutions Andy Heinig (Fraunhofer IIS/EAS, D) Michael Schiffer (Fraunhofer IZM, D) Slides (Access for event attendees only) |
| 10:15 | Q&A Peter Schneider (Fraunhofer IIS/EAS, D) |
10:25 - 11:00
Coffee Break
| 11:00 | The Integration of Sustainability into the Core of Semiconductor Manufacturing … the Only Way Forward Fiona Moclair (Intel, IE) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 11:30 | Towards E-Waste Reduction: From Eco-Design to the Creation of a European Ecosystem Chiara Sandionigi (CEA-LIST, F) Slides (Access for event attendees only) |
| 11:50 | Resource-Optimised Electronics Production – How Can This Be Implemented and Commercialised through Material Marco Kircher (Fraunhofer IPMS, D) Slides (Access for event attendees only) |
| 12:10 | On the Path towards Green and Sustainable Electronic via Digital Tools Lisa Dawel (OFFIS, D) Slides (Access for event attendees only) |
| 12:30 | Q&A Chiara Sandionigi (CEA-LIST, F) |
12:45 - 13:45
Lunch
Poster Session for European Project Results
| 14:45 | Welcome Address Federal Ministry of Education and Research Roland Krüppel (Federal Ministry of Education and Research, D) |
| 15:00 | Chips for Europe Initiative: Design Platform Marco Ceccarelli (European Commission, BE) Slides (Access for event attendees only) |
| 15:20 | Challenges and Opportunities for the European Chip Design Ecosystem Andreas Brüning (Fraunhofer-Verbund Mikroelektronik, D) |
| 15:40 | Proven Open ASIC Design-Flow – Lessons Learned & Challenges Norbert Herfurth (IHP, D) Slides (Access for event attendees only) |
| 16:00 | How "Chip Design Germany“ will Serve its Community by Working Groups – The Analog/Mixed Signal Design Working Group Holger Blume (edacentrum, D) Friedel Gerfers (TU Berlin, D) Slides (Access for event attendees only) |
| 16:20 | Q&A Ulf Schlichtmann (edacentrum, D) |
16:30 - 17:15
Coffee Break + Poster Session
| 17:15 | Siracusa: a 16nm Extended Reality PULP SoC with Heterogeneous At-MRAM Computing Francesco Conti (University of Bologna, IT) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 17:30 | Power-Aware Computing for the Internet of Things Pavel Smrz (COGNITECHNA, CZ) Slides (Access for event attendees only) |
| 17:45 | Edge-AI-Driven Real-Time Clustering for Threat Detection in 6G Networks Abdelghani Bourenane (Scuola St.'Anna, IT) Emilio Paolini (Scuola St.'Anna, IT) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 18:00 | Heterogenous Edge AI Solutions Across Industrial Sectors Marcello Coppola (STMicroelectronics, F) Ovidiu Vermesan (SINTEF, NO) Slides (Access for event attendees only) |
| 18:15 | Q&A Marcello Coppola (STMicroelectronics, F) Ovidiu Vermesan (SINTEF, NO) |
18:25 - 19:15
Break and Walk or Ride to Dinner Location
Restaurant “Dresdner Aussicht”, Kohlenstr. 18, 01189 Dresden
| 19:15 | Welcome Reception at "Dresdner Aussicht" |
| 19:30 | Dinner and Award of "EDA-Medal 2024" |
| 09:00 | The Quest for Automation - AI in Electronic-Design – Disruption or Evolution, an EDA Vendor Point of View (PCB-/System-Design Perspective) Ralf Brüning (Zuken, D) Slides (Access for event attendees only) |
| 09:30 | RISC-V and EUROPE in 2024 Stefan Wallentowitz (Hochschule München, D) Slides (Access for event attendees only) |
| 09:55 | RISC-V Automotive Roadmap Patrick Pype (NXP, NL) Slides (Access for event attendees only) |
| 10:20 | TRISTAN: High Performance Data Cache César Fuguet (CEA-LIST, F) Slides (Access for event attendees only) |
| 10:45 | REBECCA: AI/ML Inference Engine Software on the REBECCA Edge-AI Prototype for High-Reliability Applications on Space-Qualified Hardware Pablo Ghiglino (Klepsydra, CH) Slides (Access for event attendees only) |
| 11:10 | Q&A Holger Schmidt (Infineon Technologies, D) |
Poster Session for European Project Results
12:15 - 13:00
Lunch
| 13:00 | Fostering Industry Engagement in the Chips Act Marco Ceccarelli (European Commission, BE) Christoph Heer (TSMC, NL) Thomas Heurung (Siemens EDA, D) Fiona Moclair (Intel, IE) Ina Sebastian (Infineon Technologies, D) Pascal Vivet (CEA-LIST, F) Abstract |
| 14:15 | Verification of Trustability with Formal Methods and AI Djones Lettnin (Infineon Technologies, D) |
| 14:40 | Onchip Monitoring Matrix as Standard Platform Module Evaluated with a High Performance Sigma-Delta-ADC Felix Lang (Robert Bosch, D) Slides (Access for event attendees only) |
| 14:55 | Design of Trustable eFuses for Automotive E/E Architectures Thomas Markwirth (Fraunhofer IIS/EAS, D) Mehdi Meddeb (Cariad, D) Koen Velle (Synopsys, D) Slides (Access for event attendees only) |
| 15:10 | Formal Verification of Trustability of Circuits Jörg Bormann (Siemens EDA, D) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 15:25 | MEMS-Based Fingerprinting Architecture for Trustworthy Electronics Christian Schott (TU Chemnitz, D) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 15:40 | Integrated IP and Peripheral Monitoring Solution for Trustworthy SoCs Jörg Walter (OFFIS, D) Behnam Razi Perjikolaei (OFFIS, D) Georg Glaeser (IMMS, D) Gregor Nitsche (DLR, D) Abstract and Curriculum Vitae Slides (Access for event attendees only) |
| 15:55 | Q&A Ralf Popp (edacentrum, D) |
16:00 - 16:30
Coffee & Farewell
edacentrum [dot] deup