Siracusa: a 16nm Extended Reality PULP SoC with Heterogeneous At-MRAM Computing
Francesco Conti (University of Bologna, IT)
Abstract
Extended reality applications lean heavily on Machine Learning, notably utilizing DNNs with millions of parameters. These applications are bound by strict latency requirements (10-20 ms from start to finish) and operate under significant power limitations (merely a few tens of milliwatts). While enhancing ML efficiency and performance in low-power systems-on-chip can be partially addressed by integrating neural processing units, the overall power consumption at the system level is largely influenced by the energy required to access network weights from non-volatile memory. In response, we present Siracusa, a near-sensor heterogeneous SoC engineered for next-generation XR devices in 16 nm CMOS. Siracusa integrates an eight-core cluster of RISC-V digital signal processing cores with an novel direct link between a state-of-the-art digital neural engine, named N-EUREKA, and on-chip non-volatile memory employing magnetoresistive technology (MRAM). This SoC prototype demonstrates leading area efficiency at 65.2 GOp/s/mm2 and achieves energy efficiency at 8.84 Top/s/W for DNN inference tasks, while still supporting diverse and complex application workloads that merge ML tasks with traditional signal processing and control operations.
Curriculum Vitae
Francesco Conti holds the position of Tenure-Track Assistant Professor in the Department of Electrical, Electronic, and Information Engineering at the University of Bologna, Italy. He completed his Ph.D. in electronic engineering at the same university in 2016 and worked as a Post-Doctoral Researcher at ETH Zürich between 2016 and 2020. His research is centered on hardware acceleration in ultra-low power and highly energy efficient platforms, with a particular focus on System-on-Chips for Artificial Intelligence applications. He is a senior contributor to the open-source PULP Platform project initiative, and has focused also on technology transfer, most notably as a consultant for the development of the GAP9 System-on-Chip with GreenWaves Technologies.
Over his career, he has contributed to over 90 international conference presentations and journal articles, earning him multiple accolades, such as the 2020 IEEE Transactions on Circuits and Systems Darlington Best Paper Award.