Holger Blume (U Hannover, D)
Abstract
The presentation will highlight the design of two architectures for AI-based signal processing in the course of the so-called German ZUSE-research program.The first architecture that will be discussed is a fully programmable vector processor architecture that is fully scalable and therefore can be adapted to the computational needs of the AI algorithms. This processor has been designed using a virtual prototyping based design approach. It features also a very efficient memory interface. Furthermore, also the corresponding eco system like the required compiler has been developed. As exemplary applications challenging algorithms for radar, lidar and camera-based signal processing are mapped onto this architecture. The second design example is a high performance AI accelerator. This accelerator is designed to achieve highest throughput and best energy efficiency. The efficient mapping of algorithms onto this accelerator is supported by applying the Apache TVM tool. Both architectures are implemented using a 20 nm FDSOI technology. The presentation will provide key parameters of these two designs and will also mention how these ASICs will be integrated into automotive demonstrators to show their real-world application.
Curriculum Vitae
Holger Blume received his Dipl.-Ing. degree in electrical engineering from the University of Dortmund, Germany in 1992. There he also finished his PhD on nonlinear fault tolerant interpolation of intermediate images in 1997. From 1998 to 2008 he worked as a senior engineer for the Chair of Electrical Engineering and Computer Systems at the RWTH Aachen University. There he finished his habilitation degree on design space exploration for heterogeneous architectures in 2008. In July 2008 he was appointed professor for architectures and systems at the Institute of Microelectronic Systems at Leibniz University Hannover. Since 2021 he is also vice president of research and transfer of the Leibniz University Hannover. Prof. Blume is chairman of the German chapter of the IEEE Solid State Circuits Society. His research interests are in design space exploration for algorithms and architectures for digital signal processing. Main application fields, which are addressed, are biomedical applications and driver assistance systems.
