Dionysys: Design Technology for Radio Frequency Systems in Package

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In contrast to System-on-Chip designs (SoC) there is today no general design methodology for System-in-Package designs (SiP), enabling a fast, secure and high quality design, available. The partners of the research project Dionysys funded by the BMBF started their cooperation to prevent future SiP projects from failing due to missing design flow support. The target of the project is the generation of a holistic view on an integrated system including package and radio frequency (RF) parts to enable a fast and mature design of a competitive SiP solution. Topics in the projects are the definition of the system concept by considering all different technologies used in an SiP, the involvement of electromagnetic simulations to analyse package and RF structures, the automated generation and verification of RF devices and finally investigations to handle the production test of the complex SiP’s.

Classification in the edaMatrix:

Dionysys in the edaMatrix

Project coordination:

Infineon Technologies AG
Thomas Rühlicke
fon: +49 89 234 27180
thomas [dot] ruehlickeatinfineon [dot] com

Project management:

Fraunhofer Institut für Integrierte Schaltungen (IIS)
Dipl.-Ing. Uwe Knöchel
fon:

Project partners:

Research partners:

Funding initial:

BMBF F&E 01M3084

Runtime:

Sun, 01 July 2007 - Wed, 30 June 2010

Website:

http://dionysys.eas.iis.fraunhofer.de/

Project Information

Final Report
NL 01 2010 (PN)
NL 02 2009 (PB)
NL 01 2008 (PKB)

Used Abbreviations

AbbreviationMeaning
PRProject Report
SPRShort Project Report
PNProject News
FPRFinal Project Report