VALSE: Highly automated, certified, and scaled Validation of "System-on-Chip"-Designs
The realization of a complete system on one chip is a great challenge for EDA. A crucial point to solve this task is the availability of high quality modules. Such a high quality level can only be achieved by formal verification methods. VALSE is a verification project that wants to revolutionize the validation of SoC designs.
Project coordination:Infineon Technologies AG Project management:Technische Universität Kaiserslautern Project partners:
Research partners:
Funding initial:BMBF F&E 01M3052 Runtime:Thu, 01 March 2001 - Fri, 28 February 2003 Website: | Project InformationFinal Report |
Used Abbreviations
| Abbreviation | Meaning |
|---|---|
| PR | Project Report |
| SPR | Short Project Report |
| PN | Project News |
| FPR | Final Project Report |
