Integrated IP and Peripheral Monitoring Solution for Trustworthy SoCs

Jörg Walter (OFFIS, D)

Abstract

In the German research project VE-VIDES, several partners jointly created a system-on-chip-architecture that improves the trustworthiness of an SoC by integrating dedicated hardware circuits to monitor functional behaviour, timing, and energy profile. The talk shows how this run-time monitoring approach can protect against a variety of supply-chain attacks to ensure that the chip has not been tampered with.

Curriculum Vitae

Dr.-Ing. Jörg Walter is group manager of research group Distributed Computing and Communication in the R&D department Manufacturing at OFFIS, Oldenburg. His group researches embedded system hard- and software in the field of industrial automation systems with a focus on hardware achitectures and design methodology to address the challenges of modern control tasks.