Authors: Markus Becker, Universität Paderborn, DE; Christoph Kuznik, Universität Paderborn, DE; Wolfgang Mueller, Universität Paderborn, DE
Abstract:
In this article, we investigate the applicability of fault modeling and analysis in a multi-level virtual platform based design methodology for SW intensive cyber-physical systems. The focus of our methodology -- referred to as HeroeS -- is an eight levels spanning TLM refinement flow for heterogeneous application models and according virtual platforms, i.e., supporting discrete/continuous MoCs, different SW abstractions and formats. We exemplify fault modeling for high level, source level and instruction level behaviors. In accordance, we further present the mapping of our methodology to a SystemC virtual platform framework by employing several extensions, such as SystemC/AMS and QEMU wrappers. Two fault modeling use cases are considered: (i) robustness/stress testing and (ii) mutation analysis. Finally, we present experimental results from an automotive case study: a fault-tolerant fuel injection control system.
http://iccps.acm.org/2014/?q=node/10
Publication Date: 2014/04/14
Location of Publication: ACM/IEEE 5th International Conference on Cyber-Physical Systems, Berlin, Germany
Keyword: Verification
