Authors: Kai Liu, Siemens AG, DE; Andreas von Schwerin, Siemens AG, DE
Abstract:
Simulation speed is a key issue in virtual prototyping of systems consisting of multiple Systemon- Chips (SoCs). The single-threaded SystemC simulation engine is the bottleneck for achieving high simulation speed in simulating a large virtual platform (VP). To leverage the multi-core capability of workstations in VP simulation, the Synopsys MultiSim technology has been adopted. The VP is split into multiple loosely coupled subsystems that run in their own SystemC simulation processes. The synchronization and the communication among these subsystems are achieved through shared memory, an IPC (Inter-Process Communication) approach.
This paper presents the concept of the MultiSim technology and its application on a VP of an industrial distributed I/O system. A simulation speed-up by a factor of more than four – compared to a monolithic simulation of the VP composed of ten SoCs – has been achieved in the parallelized simulation.
Publication Date: 2015/06/25
Location of Publication: SNUG Germany 2015, München, DE
Keyword: Verification
